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133 lines
3.8 KiB
133 lines
3.8 KiB
/** @addtogroup adc_file ADC peripheral API
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@ingroup peripheral_apis
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@author @htmlonly © @endhtmlonly
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2016 Karl Palsson <karlp@tweak.net.au>
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This provides the "multi" extensions to the "v2" ADC peripheral. This is those
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devices that support injected channels and per channel sampling times.
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At the time of writing, this is the STM32F30x and the STM32L4x
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Karl Palsson <karlp@tweak.net.au>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/adc.h>
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/** @brief ADC Set the Sample Time for a Single Channel
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*
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* The sampling time can be selected in ADC clock cycles, exact values
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* depend on the device.
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*
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* @param[in] adc ADC block register address base @ref adc_reg_base
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* @param[in] channel ADC Channel integer @ref adc_channel
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* @param[in] time Sampling time selection from @ref adc_sample
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*/
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void adc_set_sample_time(uint32_t adc, uint8_t channel, uint8_t time)
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{
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uint32_t reg32;
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if (channel < 10) {
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reg32 = ADC_SMPR1(adc);
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reg32 &= ~(0x7 << (channel * 3));
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reg32 |= (time << (channel * 3));
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ADC_SMPR1(adc) = reg32;
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} else {
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reg32 = ADC_SMPR2(adc);
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reg32 &= ~(0x7 << ((channel - 10) * 3));
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reg32 |= (time << ((channel - 10) * 3));
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ADC_SMPR2(adc) = reg32;
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}
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}
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/** @brief ADC Set the Sample Time for All Channels
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*
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* The sampling time can be selected in ADC clock cycles, exact values
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* depend on the device.
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*
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* @param[in] adc ADC block register address base @ref adc_reg_base
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* @param[in] time Sampling time selection from @ref adc_sample
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*/
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void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time)
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{
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uint8_t i;
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uint32_t reg32 = 0;
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for (i = 0; i <= 9; i++) {
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reg32 |= (time << (i * 3));
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}
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ADC_SMPR1(adc) = reg32;
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for (i = 10; i <= 17; i++) {
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reg32 |= (time << ((i - 10) * 3));
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}
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ADC_SMPR2(adc) = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief ADC Set a Regular Channel Conversion Sequence
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*
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* Define a sequence of channels to be converted as a regular group with a
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* length from 1 to 16 channels. If this is called during conversion, the
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* current conversion is reset and conversion begins again with the newly
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* defined group.
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*
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* @param[in] adc ADC block register address base @ref adc_reg_base
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* @param[in] length Number of channels in the group, range 0..16
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* @param[in] channel Set of channels in sequence, range @ref adc_channel
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*/
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void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[])
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{
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uint32_t reg32_1 = 0, reg32_2 = 0, reg32_3 = 0, reg32_4 = 0;
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uint8_t i = 0;
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/* Maximum sequence length is 16 channels. */
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if (length > 16) {
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return;
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}
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for (i = 1; i <= length; i++) {
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if (i <= 4) {
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reg32_1 |= (channel[i - 1] << (i * 6));
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}
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if ((i > 4) && (i <= 9)) {
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reg32_2 |= (channel[i - 1] << ((i - 4 - 1) * 6));
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}
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if ((i > 9) && (i <= 14)) {
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reg32_3 |= (channel[i - 1] << ((i - 9 - 1) * 6));
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}
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if ((i > 14) && (i <= 16)) {
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reg32_4 |= (channel[i - 1] << ((i - 14 - 1) * 6));
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}
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}
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reg32_1 |= ((length - 1) << ADC_SQR1_L_SHIFT);
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ADC_SQR1(adc) = reg32_1;
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ADC_SQR2(adc) = reg32_2;
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ADC_SQR3(adc) = reg32_3;
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ADC_SQR4(adc) = reg32_4;
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}
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/**@}*/
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