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165 lines
4.6 KiB
165 lines
4.6 KiB
/** @addtogroup port_file IO Port API
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* @ingroup peripheral_apis
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* @brief <b>Access functions for the SAMD I/O Controller</b>
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* @date 10 April 2020
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* @copyright SPDX: LGPL-3.0-or-later
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* @author 2020 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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*/
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/**@{*/
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#include <libopencm3/sam/d/port.h>
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/** @brief Initialize GPIO pins
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*
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* Configure a group of Pins for the given port.
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*
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* @param[in] gpioport port register address base @ref port_reg_base
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* @param[in] mode direction @ref gpio_direction
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* @param[in] cnf configuration mode @ref gpio_cnf
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* @param[in] gpios @ref gpio_pin_id. Any combination of pins
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* may be specified by OR'ing then together.
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*/
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void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t cnf, uint32_t gpios)
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{
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uint32_t reg = PORT_WRCONFIG_WRPINCFG;
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/* enable pull */
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if (cnf == GPIO_CNF_PULLDOWN || cnf == GPIO_CNF_PULLUP) {
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reg |= PORT_WRCONFIG_PULLEN;
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}
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/* enable input buffer */
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if (mode != GPIO_MODE_OUTPUT) {
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reg |= PORT_WRCONFIG_INEN;
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}
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/* set pmuxen */
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if (cnf == GPIO_CNF_AF) {
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reg |= PORT_WRCONFIG_PMUXEN;
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}
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/* PORTx_WRCONFIG allows to configure pins [31:16] or [15:0] */
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/* write low pins */
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PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_PINMASK(gpios);
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/* write high pins */
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PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_HWSEL |
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PORT_WRCONFIG_PINMASK(gpios >> 16);
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/* configure port direction for selected gpios */
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/* DIR is always 0 when PULL */
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if (cnf == GPIO_CNF_PULLDOWN || cnf == GPIO_CNF_PULLUP) {
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PORT_DIRCLR(gpioport) = gpios;
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} else if (mode == GPIO_MODE_INPUT) {
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PORT_DIRCLR(gpioport) = gpios;
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} else {
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PORT_DIRSET(gpioport) = gpios;
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}
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/* PULL UP/DOWN is configured through OUT */
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if (cnf == GPIO_CNF_PULLDOWN) {
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PORT_OUTCLR(gpioport) = gpios;
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} else if (cnf == GPIO_CNF_PULLUP) {
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PORT_OUTSET(gpioport) = gpios;
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}
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}
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/** @brief Alternate function GPIO pins
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*
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* Configure a group of Pins in alternate function.
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*
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* @param[in] gpioport port register address base @ref port_reg_base
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* @param[in] af pmux configuration @ref gpio_mux
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* @param[in] gpios @ref gpio_pin_id. Any combination of pins
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* may be specified by OR'ing then together.
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*/
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void gpio_set_af(uint32_t gpioport, uint8_t af, uint32_t gpios)
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{
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uint32_t reg = PORT_WRCONFIG_WRPINCFG |
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PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_PMUX(af) |
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PORT_WRCONFIG_PMUXEN;
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/* write gpios[15:0] */
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PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_PINMASK(gpios);
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/* write gpios[31:16] */
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PORT_WRCONFIG(gpioport) = reg | PORT_WRCONFIG_HWSEL |
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PORT_WRCONFIG_PINMASK(gpios >> 16);
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}
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/** @brief Set a group of Pins
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*
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* Set a group of Pins for the given port.
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*
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* @param[in] gpioport port register address base @ref port_reg_base
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* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
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* specified by OR'ing then together.
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*/
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void gpio_set(uint32_t gpioport, uint32_t gpios)
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{
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PORT_OUTSET(gpioport) = gpios;
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}
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/** @brief Clear a group of Pins
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*
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* Clear a group of Pins for the given port.
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*
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* @param[in] gpioport port register address base @ref port_reg_base
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* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
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* specified by OR'ing then together.
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*/
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void gpio_clear(uint32_t gpioport, uint32_t gpios)
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{
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PORT_OUTCLR(gpioport) = gpios;
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}
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/** @brief Read level of a group of Pins
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*
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* Read the level of a group of Pins for the given port.
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*
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* @param[in] gpioport port register address base @ref port_reg_base
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* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
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* specified by OR'ing then together.
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*/
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uint32_t gpio_get(uint32_t gpioport, uint32_t gpios)
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{
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return PORT_IN(gpioport) & gpios;
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}
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/** @brief Toggle level of a group of Pins
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*
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* Toggle one or more pins of the givent port.
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*
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* @param[in] gpioport port register address base @ref port_reg_base
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* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be
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* specified by OR'ing then together.
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*/
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void gpio_toggle(uint32_t gpioport, uint32_t gpios)
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{
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PORT_OUTTGL(gpioport) = gpios;
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}
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/** @brief Read level for all pins from a port
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*
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* Read the level of all pins of the given port.
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*
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* @param[in] port register address base @ref port_reg_base
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*
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* @return The level of all pins on the port.
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*/
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uint32_t port_read(uint32_t port)
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{
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return PORT_IN(port);
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}
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/** @brief Set level for all pins from a port
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*
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* Set the level of all pins of the given port.
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*
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* @param[in] port register address base @ref port_reg_base
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* @param[in] data @ref gpio_pin_id. Any combination of pins
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* may be specified by OR'ing then together.
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*/
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void port_write(uint32_t port, uint32_t data)
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{
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PORT_OUT(port) = data;
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}
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/**@}*/
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